Here is the output of lspci:
00:00.0 Host bridge: Silicon Integrated Systems [SiS] 530 Host (rev 02)
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV-
VGASnoop- ParErr- Stepping- SERR- FastB2B-
Status: Cap+ 66Mhz- UDF- FastB2B- ParErr-
DEVSEL=medium >TAbort- <TAbort- <MAbort+ >SERR- <PERR-
Latency: 32
Region 0: Memory at e0000000 (32-bit,
non-prefetchable) [size=64M]
Capabilities: <available only to root>
00: 39 10 30 05 07 00 10 22 02 00 00 06 00 20 80 00
10: 00 00 00 e0 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 c0 00 00 00 00 00 00 00 00 00 00 00
00:00.1 IDE interface: Silicon Integrated Systems [SiS] 5513 [IDE] (rev
d0) (prog-if 8a [Master SecP PriP])
Subsystem: Silicon Integrated Systems [SiS] SiS5513
EIDE Controller (A,B step)
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV-
VGASnoop- ParErr- Stepping- SERR- FastB2B-
Status: Cap- 66Mhz- UDF- FastB2B- ParErr-
DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 128
Interrupt: pin A routed to IRQ 0
Region 0: I/O ports at <ignored>
Region 1: I/O ports at <ignored>
Region 2: I/O ports at <ignored>
Region 3: I/O ports at <ignored>
Region 4: I/O ports at 9880 [size=16]
00: 39 10 13 55 07 00 00 00 d0 8a 01 01 00 80 80 00
10: 81 94 00 00 c1 94 00 00 01 98 00 00 41 98 00 00
20: 81 98 00 00 00 00 00 00 00 00 00 00 39 10 13 55
30: 00 00 00 00 00 00 00 00 00 00 00 00 ff 01 00 00
00:01.0 ISA bridge: Silicon Integrated Systems [SiS] 85C503/5513 (rev
b1)
Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV-
VGASnoop- ParErr- Stepping- SERR- FastB2B-
Status: Cap- 66Mhz- UDF- FastB2B- ParErr-
DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 0
00: 39 10 08 00 0f 00 00 02 b1 00 01 06 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00:01.1 Class ff00: Silicon Integrated Systems [SiS] ACPI
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV-
VGASnoop- ParErr- Stepping- SERR- FastB2B-
Status: Cap- 66Mhz- UDF- FastB2B- ParErr-
DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
00: 39 10 09 00 00 00 00 02 00 00 00 ff 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00:01.2 USB Controller: Silicon Integrated Systems [SiS] 7001 (rev 11)
(prog-if 10 [OHCI])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV-
VGASnoop- ParErr- Stepping- SERR- FastB2B-
Status: Cap- 66Mhz- UDF- FastB2B+ ParErr-
DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 32 (20000ns max), cache line size 08
Interrupt: pin A routed to IRQ 11
Region 0: Memory at 81300000 (32-bit,
non-prefetchable) [size=4K]
00: 39 10 01 70 07 00 80 02 11 10 03 0c 08 20 80 00
10: 00 00 30 81 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 0b 01 00 50
00:02.0 PCI bridge: Silicon Integrated Systems [SiS] 5591/5592 AGP
(prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV-
VGASnoop- ParErr- Stepping- SERR- FastB2B-
Status: Cap- 66Mhz- UDF- FastB2B- ParErr-
DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 0
Bus: primary=00, secondary=01, subordinate=01,
sec-latency=0
I/O behind bridge: 00008000-00008fff
Memory behind bridge: 80300000-803fffff
Prefetchable memory behind bridge: 80400000-810fffff
BridgeCtl: Parity- SERR- NoISA- VGA+ MAbort-
>Reset- FastB2B-
00: 39 10 01 00 07 00 00 00 00 00 04 06 00 00 01 00
10: 00 00 00 00 00 00 00 00 00 01 01 00 80 80 00 20
20: 30 80 30 80 40 80 00 81 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 08 00
00:09.0 Ethernet controller: Realtek Semiconductor Co., Ltd.
RTL-8029(AS)
Subsystem: Allied Telesyn International AT-2400
Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV-
VGASnoop- ParErr- Stepping- SERR- FastB2B-
Status: Cap- 66Mhz- UDF- FastB2B- ParErr-
DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Interrupt: pin A routed to IRQ 10
Region 0: I/O ports at 7000 [size=32]
00: ec 10 29 80 03 00 00 02 00 00 00 02 00 00 00 00
10: 01 70 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 59 12 00 24
30: 00 00 00 00 00 00 00 00 00 00 00 00 0a 01 00 00
00:0a.0 Communication controller: Conexant HCF 56k Data/Fax Modem (rev
08)
Subsystem: GVC Corporation IBM
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV-
VGASnoop- ParErr- Stepping- SERR- FastB2B-
Status: Cap+ 66Mhz- UDF- FastB2B+ ParErr-
DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 32
Interrupt: pin A routed to IRQ 4
Region 0: Memory at 80100000 (32-bit,
non-prefetchable) [size=64K]
Region 1: I/O ports at 7040 [size=8]
Capabilities: <available only to root>
00: f1 14 33 10 07 00 90 02 08 00 80 07 00 20 00 00
10: 00 00 10 80 41 70 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 e0 13 b0 02
30: 00 00 00 00 40 00 00 00 00 00 00 00 04 01 00 00
00:0c.0 Multimedia audio controller: ESS Technology ES1969 Solo-1
Audiodrive (rev 01)
Subsystem: ESS Technology Solo-1 Audio Adapter
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV-
VGASnoop- ParErr- Stepping- SERR- FastB2B-
Status: Cap+ 66Mhz- UDF- FastB2B+ ParErr-
DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 32 (500ns min, 6000ns max)
Interrupt: pin A routed to IRQ 5
Region 0: I/O ports at 9000 [size=64]
Region 1: I/O ports at 9080 [size=16]
Region 2: I/O ports at 90c0 [size=16]
Region 3: I/O ports at 9400 [size=4]
Region 4: I/O ports at 9440 [size=4]
Capabilities: <available only to root>
00: 5d 12 69 19 05 00 90 02 01 00 01 04 00 20 00 00
10: 01 90 00 00 81 90 00 00 c1 90 00 00 01 94 00 00
20: 41 94 00 00 00 00 00 00 00 00 00 00 5d 12 88 88
30: 00 00 00 00 c0 00 00 00 00 00 00 00 05 01 02 18
01:00.0 VGA compatible controller: Silicon Integrated Systems [SiS]
6306 3D-AGP (rev a2) (prog-if 00 [VGA])
Subsystem: Silicon Integrated Systems [SiS]
SiS530,620 GUI Accelerator+3D
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV-
VGASnoop- ParErr- Stepping- SERR- FastB2B-
Status: Cap+ 66Mhz+ UDF- FastB2B- ParErr-
DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 32 (500ns min)
Region 0: Memory at 80800000 (32-bit, prefetchable)
[size=8M]
Region 1: Memory at 80300000 (32-bit,
non-prefetchable) [size=64K]
Region 2: I/O ports at 8000 [size=128]
Capabilities: <available only to root>
00: 39 10 06 63 07 00 30 02 a2 00 00 03 00 20 00 00
10: 08 00 80 80 00 00 30 80 01 80 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 39 10 06 63
30: 00 00 00 00 40 00 00 00 00 00 00 00 00 00 02 00